-
No Global Bundle Configuration: The default global
config option
config_interface -m_axi_auto_max_ports false
automatically bundles all compatiblem_axi
interfaces into a single interface, and impacts the bundle rules as follows:- Rule 1: User-specified Bundle Name:
- This rule explicitly groups all interface ports with
the same
bundle=<string>
into a singlem_axi
interface port and names the RTL ports the value specified bym_axi_<string>
.#pragma HLS INTERFACE m_axi port=a depth=50 bundle=newport #pragma HLS INTERFACE m_axi port=b depth=50 bundle=newport #pragma HLS INTERFACE m_axi port=c depth=50 bundle=newport Log file INFO: [RTGEN 206-500] Setting interface mode on port 'example/newport' to 'm_axi'. INFO: [RTGEN 206-500] Setting interface mode on port 'example/newport' to 'm_axi'. INFO: [RTGEN 206-500] Setting interface mode on port 'example/newport' to 'm_axi'.
Any ports without the
bundle
specified are grouped into the default interfacegmem0
.#pragma HLS INTERFACE m_axi port=a depth=50 bundle=newport #pragma HLS INTERFACE m_axi port=b depth=50 #pragma HLS INTERFACE m_axi port=c depth=50 Log file INFO: [RTGEN 206-500] Setting interface mode on port 'example/newport' to 'm_axi'. INFO: [RTGEN 206-500] Setting interface mode on port 'example/gmem0' to 'm_axi'. INFO: [RTGEN 206-500] Setting interface mode on port 'example/gmem0' to 'm_axi'.
- Rule 2: Default Bundle Name:
- This rule explicitly groups all interface ports with no
bundle name specified into a single
m_axi
interface port and names the portm_axi_gmem0
.#pragma HLS INTERFACE m_axi port=a depth=50 #pragma HLS INTERFACE m_axi port=b depth=50 #pragma HLS INTERFACE m_axi port=c depth=50 Log file INFO: [RTGEN 206-500] Setting interface mode on port 'example/gmem0' to 'm_axi'. INFO: [RTGEN 206-500] Setting interface mode on port 'example/gmem0' to 'm_axi'. INFO: [RTGEN 206-500] Setting interface mode on port 'example/gmem0' to 'm_axi'.
-
Global Bundle Configuration: The global config
option
config_interface -m_axi_auto_max_ports true
explicitly maps allm_axi
interface ports without a bundle name into individual interface ports and names the RTL ports sequentially asm_axi_gmem0
,m_axi_gmem1
,m_axi_gmem2
,...