Vitis HLS transforms the region to apply the DATAFLOW optimization. Xilinx recommends writing the code inside this region (referred to as the canonical region) using canonical forms. There are two main canonical forms for the dataflow optimization:
- The canonical form for a function where sub-functions are not
inlined.
void dataflow(Input0, Input1, Output0, Output1) { #pragma HLS dataflow UserDataType C0, C1, C2; func1(read Input0, read Input1, write C0, write C1); func2(read C0, read C1, write C2); func3(read C2, write Output0, write Output1); }
- Dataflow inside a loop body.
For the for loop (where no function inside is inlined), the integral loop variable should have:
- Initial value declared in the loop header and set to 0.
- The loop bound is a positive numerical constant or constant function argument.
- Increment by 1.
- Dataflow pragma needs to be inside the
loop.
void dataflow(Input0, Input1, Output0, Output1) { for (int i = 0; i < N; i++) { #pragma HLS dataflow UserDataType C0, C1, C2; func1(read Input0, read Input1, write C0, write C1); func2(read C0, read C0, read C1, write C2); func3(read C2, write Output0, write Output1); } }