DDS Struct Parameter Values - 2022.1 English

Vitis High-Level Synthesis User Guide (UG1399)
Document ID
UG1399
Release Date
2022-06-07
Version
2022.1 English

The following table shows the possible values for the hls::ip_dds::params_t parameterization struct parameters.

Table 1. DDS Struct Parameter Values
Parameter C Type Default Value Valid Values
DDS_Clock_Rate double 20.0 Any double value
Channels unsigned 1 1 to 16
Mode_of_Operation unsigned XIP_DDS_MOO_CONVENTIONAL XIP_DDS_MOO_CONVENTIONAL truncates the accumulated phase.

XIP_DDS_MOO_RASTERIZED selects rasterized mode.
Modulus unsigned 200 129 to 256
Spurious_Free_Dynamic_Range double 20.0 18.0 to 150.0
Frequency_Resolution double 10.0 0.000000001 to 125000000
Noise_Shaping unsigned XIP_DDS_NS_NONE XIP_DDS_NS_NONE produces phase truncation DDS.

XIP_DDS_NS_DITHER uses phase dither to improve SFDR at the expense of increased noise floor.

XIP_DDS_NS_TAYLOR interpolates sine/cosine values using the otherwise discarded bits from phase truncation

XIP_DDS_NS_AUTO automatically determines noise-shaping.
Phase_Width unsigned 16 Must be an integer multiple of 8
Output_Width unsigned 16 Must be an integer multiple of 8
Phase_Increment unsigned XIP_DDS_PINCPOFF_FIXED XIP_DDS_PINCPOFF_FIXED fixes PINC at generation time, and PINC cannot be changed at runtime.

This is the only value supported.
Phase_Offset unsigned XIP_DDS_PINCPOFF_NONE XIP_DDS_PINCPOFF_NONE does not generate phase offset.

XIP_DDS_PINCPOFF_FIXED fixes POFF at generation time, and POFF cannot be changed at runtime.
Output_Selection unsigned XIP_DDS_OUT_SIN_AND_COS XIP_DDS_OUT_SIN_ONLY produces sine output only.

XIP_DDS_OUT_COS_ONLY produces cosine output only.

XIP_DDS_OUT_SIN_AND_COS produces both sin and cosine output.
Negative_Sine unsigned XIP_DDS_ABSENT XIP_DDS_ABSENT produces standard sine wave.

XIP_DDS_PRESENT negates sine wave.
Negative_Cosine bool XIP_DDS_ABSENT XIP_DDS_ABSENT produces standard sine wave.

XIP_DDS_PRESENT negates sine wave.
Amplitude_Mode unsigned XIP_DDS_FULL_RANGE XIP_DDS_FULL_RANGE normalizes amplitude to the output width with the binary point in the first place. For example, an 8-bit output has a binary amplitude of 100000000 - 10 giving values between 01111110 and 11111110, which corresponds to just less than 1 and just more than -1, respectively.

XIP_DDS_UNIT_CIRCLE normalizes amplitude to half full range, that is, values range from 01000 .. (+0.5). to 110000 .. (-0.5).
Memory_Type unsigned XIP_DDS_MEM_AUTO XIP_DDS_MEM_AUTO selects distributed ROM for small cases where the table can be contained in a single layer of memory and selects block ROM for larger cases.

XIP_DDS_MEM_BLOCK always uses block RAM.

XIP_DDS_MEM_DIST always uses distributed RAM.
Optimization_Goal unsigned XIP_DDS_OPTGOAL_AUTO XIP_DDS_OPTGOAL_AUTO automatically selects the optimization goal.

XIP_DDS_OPTGOAL_AREA optimizes for area.

XIP_DDS_OPTGOAL_SPEED optimizes for performance.
DSP48_Use unsigned XIP_DDS_DSP_MIN XIP_DDS_DSP_MIN implements the phase accumulator and the stages for phase offset, dither noise addition, or both in FPGA logic.

XIP_DDS_DSP_MAX implements the phase accumulator and the phase offset, dither noise addition, or both using DSP slices. In the case of single channel, the DSP slice can also provide the register to store programmable phase increment, phase offset, or both and thereby, save further fabric resources.
Latency_Configuration unsigned XIP_DDS_LATENCY_AUTO XIP_DDS_LATENCY_AUTO automatically determines he latency.

XIP_DDS_LATENCY_MANUAL manually specifies the latency using the Latency option.
Latency unsigned 5 Any value
Output_Form unsigned XIP_DDS_OUTPUT_TWOS XIP_DDS_OUTPUT_TWOS outputs two's complement.

XIP_DDS_OUTPUT_SIGN_MAG outputs signed magnitude.
PINC[XIP_DDS_CHANNELS_MAX] unsigned array {0} Any value for the phase increment for each channel
POFF[XIP_DDS_CHANNELS_MAX] unsigned array {0} Any value for the phase offset for each channel