Alternative 2: Using a Single Instance of AXI Register Slice to Span Multiple SLRs - 2.1 English

AXI Register Slice LogiCORE IP Product Guide (PG373)

Document ID
PG373
Release Date
2022-11-02
Version
2.1 English
  1. Add a single instance of AXI Register Slice IP core into the AXI interface connection of IP cores A and B.
  2. Double-click the AXI Register Slice core and configure all Register Slice Options to one of the following alternative modes, as best suited to your application:
    SLR TDM Crossing
    Pipelines only the crossing pathways between two adjacent SLRs using half the number of cross-SLR wires, but requiring a double-frequency clock input.
    Multi-SLR Crossing
    Pipelines a pathway that crosses zero or more SLRs, and can further add pipeline stages to span the distance between the SLR boundaries and the connected endpoint IP. Optionally enable Auto-Pipeline Insertion mode by checking the Use timing-driven pipeline insertion box.
  3. Add XDC constraints to place each of the master endpoint IP (core A) and slave endpoint IP (core B) into their respective SLRs. Optionally add XDC constraint to the design which places the submodules within the AXI Register Slice core into the same SLRs as the connected endpoint IP. Constraining the AXI Register Slice submodules might be necessary if your implementation results lead to SLR crossings anywhere other than the intended pipelined pathway within the AXI Register Slice. This will typically result in timing-critical paths. See Constraining the Core sections for more details.