IP Facts - 2.0 English

AXI4 Debug Hub LogiCORE IP Product Guide (PG361)

Document ID
Release Date
2.0 English
AMD LogiCORE™ IP Facts Table
Core Specifics
Supported Device Family 1 AMD Versal™ Adaptive SoC
Supported User Interfaces AXI4 and AXI4-Stream
Provided with Core
Design Files Encrypted RTL
Example Design Verilog
Test Bench Not Provided
Constraints File XDC
Simulation Model Not provided
Supported S/W Driver N/A
Tested Design Flows 2
Design Entry AMD Vivado™ Design Suite
Simulation Not supported
Synthesis Vivado Synthesis
All Vivado IP Change Logs Master Vivado IP Change Logs: 72775
Support web page
  1. For a complete list of supported devices, see the AMD Vivado™ IP catalog.
  2. For the supported versions of the tools, see the Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973).