When you select this mode, different options are displayed. You can directly input the Source PLL, M, and D values for various PLLs as well as individual peripheral clock divisor values enabling finer control. In Manual clocking mode, the default divisor values are given for input ref clock frequency of 33.33 MHz. If you move to the manual mode with different ref clock frequency, then you encounter DRCs for divisor values that you need to resolve manually.