Clock |
Frequency (MHz) |
Duty Cycle |
---|---|---|
clk_out2 |
300 (= clk_out1/2) |
50 |
clk_out3 |
200 (= clk_out1/3) |
33.33 |
clk_out4 |
150 (= clk_out1/4) |
50 |
clk_out5 |
120 (= clk_out1/5) |
40 |
clk_out6 |
100 (= clk_out1/6) |
50 |
clk_out7 |
100 (= clk_out1/6) |
50 |
X-Ref Target - Figure 3-1 |
1. Optimize clock structure not enabled:
° The resource tab shows one MMCM, one IBUFG, and seven BUFG.
° The clocking structure is as follows (which is non-optimal):
X-Ref Target - Figure 3-2 |
° The summary table is as follows:
X-Ref Target - Figure 3-3 |
2. Optimize clock structure enabled:
° The resource tab is updated immediately after enabling optimized clocking structure:
° The clocking structure is as follows:
X-Ref Target - Figure 3-5 |
° The summary table is as follows:
X-Ref Target - Figure 3-6 |