Each edge of the generated clock waveform can also be individually shifted by a
positive or negative value by using the -edge_shift option. Use
this option only if a phase shift is needed.
The -edge_shift option cannot be used at the same time as any of the
following:
-
-divide_by -
-multiply_by -
-invert
Consider the master clock clkin with a 10 ns period and a 50% duty
cycle. It reaches the cell mmcm0 which generates a clock with a 25% duty cycle,
shifted by 90 degrees. The generated clock definition refers to the master clock
edges 1, 2, and 3. These edges respectively occur at 0 ns, 5 ns, and 10 ns. To
obtain the desired waveform, shift the first and the third edges by 2.5 ns.
create_clock -name clkin -period 10 [get_ports clkin]
create_generated_clock -name clkshift -source [get_pins mmcm0/CLKIN] -edges {1 2 3} \
-edge_shift {2.5 0 2.5} [get_pins mmcm0/CLKOUT] # First rising edge: 0ns + 2.5ns = 2.5ns
# Falling edge: 5ns + 0ns = 5ns
# Second rising edge: 10ns + 2.5ns = 12.5ns
Note: The
-edge_shift values can be
positive or negative.Figure 1. Generated Clock Example Three
