The constraints from a particular XDC file can be optionally scoped to a specific module, to specific cells of your design, or both, if needed. This is convenient for creating and applying constraints to a sub-level of your design without having any information about the top-level. The block-level constraints must be developed independently from the top-level constraints, and must be as generic as possible so that they can be used in various contexts. They must also not affect any logic that is beyond the block boundaries. By default, all the IP cores from the Vivado IP catalog generated within a Vivado Design Suite project use this mechanism to load their constraints in memory.