The Vivado IDE uses the following terminology to describe IP, where it is stored, and how it is represented.
- IP Definition: The description of the IP-XACT characteristics for IP.
- IP Customization: Customizing an IP from an IP definition, resulting in an XCI file. The XCI file stores the user-specified configuration.
- IP Location: A directory that contains one or more customized IP in the current project.
- IP Repository: A unified view of a collection of IP definitions added to the Xilinx IP catalog.
- IP Catalog: The IP catalog allows for the exploration of Xilinx plug-and-play intellectual property (IP), as well as other IP-XACT-compliant IP provided by third-party vendors. This can include designs that you package as IP. See IP Basics, for more information.
- Output Products: Generated files produced for an IP customization. They can include HDL, constraints, and simulation targets. During output product generation, the Vivado tools store IP customizations in the XCI file and uses the XCI file to produce the files used during synthesis and simulation.
- Global Synthesis: To synthesize the IP along with the top-level user logic.
- Out-Of-Context (OOC) Design Flow: The OOC design flow creates a standalone synthesis design run for generated output products. This default flow creates a design checkpoint file (DCP) as well as a Xilinx design constraints file (_ooc.xdc). See Out-of-Context Flow for more information.
- Hierarchical IP and Subsystem IP: These terms are used interchangeably to describe an IP which is a sub-system built with multiple IP in a hierarchical topology as a part of a block design or RTL flow.
- Sub-core IP: The term sub-core IP refers to an IP used within another IP that is not Hierarchical (Subsystem) IP. This could be IP from the Vivado IP catalog, user-defined IP, third-party IP, or IP core libraries.