RPU Configuration Options - 2022.1 English

Versal ACAP System Software Developers Guide (UG1304)

Document ID

UG1304

Release Date

2022-04-21

Version

2022.1 English

The following table and figure describe the four configuration options of the RPU.

Table 1. RPU Configuration Options
Configuration Option	Description	Core Running
Option 1: Split mode	High-performance mode. In this configuration, both real-time cores work independently, each using separate TCMs.	RPU core 0 and RPU core 1
Option 2: Split mode, only one core used	High-performance mode. In this configuration, RPU core 0 can be held in reset, while RPU core 1 runs independently using all 256 KB of TCM.	RPU core 1 only
Option 3: Lock-step mode	Safety mode. Note: The lock-step mode is typically used for safety-critical deterministic applications. In this configuration, both cores run in parallel with each other, with integrated comparator logic. The RPU core 0 is the master, and RPU core 1 is the checker. The TCM is combined to give RPU core 0 a larger TCM. Each core executes the same code. The inputs and outputs of the two cores are compared. If they do not match, then the comparator detects the error. While two cores are used, the performance is of one core.	RPU core 0 only
Option 4: None	RPU is not used.	None
RPU core 0 TCM is the tightly coupled memory associated with Cortex-R5F core 0 core in split mode; RPU core 1 TCM is the tightly-coupled memory associated with the RPU_0 core in split mode. RPU core 1 TCM is located slightly farther from the cores than RPU core 0 TCM, so there might be a slightly longer delay when cores access RPU core 1 TCM versus RPU core 0 TCM.

RPU cores can use the system watchdog timer (SWDT) to monitor functionality and check performance, through a periodic write to a timer register.

Figure 1. RPU Configuration Options

The following figure shows the resource sharing when the RPU cores are configured in lock-step mode.

Figure 2. RPU Cortex-R5F Processor Lock-step Mode