Virtualization with Hypervisor - 2022.1 English

Versal ACAP System Software Developers Guide (UG1304)

Document ID
UG1304
Release Date
2022-04-21
Version
2022.1 English

Versal devices have hardware virtualization extensions on the Arm Cortex-A72 processors, Arm GIC-500 interrupt controller, and Arm System MMU (SMMU) that enables the use of hypervisors and enables greater hypervisor performance.

The following figure shows an example hypervisor architecture running on a Versal device. In this example, the hypervisor runs an SMP-capabable OS, such as Linux, an RTOS, or a bare-metal application.

Figure 1. Example Hypervisor Architecture

The addition of a hypervisor introduces a layer of software that can add design complexity to low-level system functions, such as peripheral and accelerators access. Xilinx recommends that developers initiate efforts early into these aspects of system architecture and implementation.