Fanout - 2021.2 English

Xilinx Power Estimator User Guide (UG440)

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2021.2 English

Fanout defined in XPE is similar to the fanout reported by the synthesis tool and can differ from the fanout reported by the implementation tool. This difference is expected because fanout will vary with placement and packing of the logic.

  • In XPE, fanout represents the number of individual loads or logic elements the considered element is connected to (LUTs, flip-flops, block RAM, I/O flip-flops, distributed RAM, and shift registers).
  • In the Vivado® IDE, fanout represents the number of SLICEs the considered net is routed to. A SLICE typically contains multiple logic elements and you generally do not control packing of the different elements into SLICEs. XPE algorithms will estimate this packing before calculating the power.