Design Activity - 2021.2 English

Xilinx Power Estimator User Guide (UG440)

Document ID
UG440
Release Date
2021-10-22
Version
2021.2 English
Clock
Specify a single clock frequency, in MHz. The Clock frequency defaults to different values for the different device families ( Artix®-7 (including Artix®-7 Automotive), Kintex®-7, and Virtex®-7), but you can set the Clock frequency to any value.
Toggle
Enter a single Toggle rate (in %). This toggle rate will apply to all the resources in the Logic or to the BRAM.
Enable
Enter a single Enable rate (in %). The Enable rate will apply to the slice clock enable in the Logic or to the BRAM enable.