Embedded Flow - 2021.2 English

Versal ACAP System Software Developers Guide (UG1304)

Document ID
UG1304
Release Date
2021-10-27
Version
2021.2 English

Based on the open source Eclipse platform, the Vitis development environment provides a complete environment for creating software applications that are targeted for Xilinx embedded processors. The environment includes a GNU-based compiler toolchain, C/C++ development toolkit (CDT), JTAG debugger, flash programmer, middleware libraries, bare-metal BSPs, and drivers for Xilinx IP. The development environment also includes a robust IDE for C/C++ bare-metal and Linux application development and debugging.

The development environment lets you create software applications using a unified set of Xilinx tools for the Arm Cortex®-A72 and Cortex®-R5F processors, as well as the Xilinx MicroBlaze™ processors. The environment provides the following methods to create applications:

  • Bare-metal and FreeRTOS applications for MicroBlaze processors
  • Bare-metal, Linux, and FreeRTOS applications for APU
  • Bare-metal and FreeRTOS applications for RPU
  • User customization of PLM, which is primarily used to boot Versal ACAP
  • Library examples are provided with Vitis (ready to load sources and build), as follows:
    • OpenCV
    • OpenAMP RPC
    • FreeRTOS “HelloWorld”
    • LWIP
    • Performance tests (Dhrystone, memory tests, and peripheral tests)
    • Cryptographic hardware engine access
    • eFUSE and BBRAM programming
    • PLM

After a hardware design is created in the Vivado IDE, you can export a block design along with hardware design and bitstream files to the Vitis tool export directory directly from the Vivado project navigator.

All processes necessary to successfully complete this export process are run automatically. The Vitis tool process exports the following files to the Vitis tool directory:

.xpr
Vivado project file
.pdi
Contains PLM file (plm.elf), PSM firmware (psm_fw.elf) and all design specific CDO files (pmc_data.cdo, lpd_data.cdo, *.rcdo, *.rnpi, ai_engine_data.cdo (if AI Engine is used), and fpd_data.cdo)
.xsa
Xilinx Support Archive for the design.

The Vitis environment can also generate programmable device image (PDI) for secure and non-secure boot for the following processors:

  • Arm Cortex-A72
  • Arm Cortex-R5F
  • MicroBlaze

The Vitis environment supports Linux application development and debugging.

For more information, see Vitis Embedded Software Development Flow Documentation (UG1400).