OpenAMP - 2021.2 English

Versal ACAP System Software Developers Guide (UG1304)

Document ID
UG1304
Release Date
2021-10-27
Version
2021.2 English

Xilinx participates in OpenAMP, which is an open source project that provides support for APU and RPU communication. This communication path provides essential features that allow usage of the entire Versal ACAP. For example, using OpenAMP, the APU can load and unload the RPU software, and reset the RPU as needed.

The OpenAMP framework provides software components that enable development of software applications for AMP systems. The framework provides the following key capabilities:

  • Provides lifecycle management and inter processor communication capabilities for management of remote compute resources and their associated software contexts.
  • Provides a standalone library usable with RTOS and bare-metal software environments.
  • Compatibility with upstream Linux remoteproc and RPMsg components

The OpenAMP supports the following configurations:

  • Linux master/generic (bare-metal) remote
  • Generic (bare-metal) master/Linux remote
  • Generic (bare-metal) master/generic (bare-metal) remote

Proxy infrastructure and supplied demos showcase the ability of proxy on master to handle printf, scanf, open, close, read, and write calls from bare-metal based remote contexts.

For more advanced features, such as enhanced system management or higher level communications APIs, you might find helpful content within the OpenAMP community project, whose software targets Xilinx SoCs and others.

The OpenAMP framework provides mechanisms to do the following:

  • Load and unload firmware
  • Communicate between applications using a standard API

    The following diagram shows an example of an OpenAMP architecture on a Versal device.

    In this case, Linux applications running on the APU communicate with RPU through RPMsg protocol. Linux applications can load and unload applications on RPU with Remoteproc framework. This allows developers to load various dedicated algorithms to the RPU processing engines as needed with very deterministic performance. Notice that this architecture uses a mixture of SMP and AMP modes.

Figure 1. Example with SMP and AMP Using OpenAMP Framework

For more information, see https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841718/OpenAMP on the Xilinx Wiki.