The resource utilization of several DPUCVDX8G architectures is shown in the following table. C32 means that the CPB_N (number of AI Engines per batch handler) is 32. C64 means that the CPB_N=64. B3 means that there are three batch handlers, CU1 means that the number of compute unit is 1, and L2S2 means that there are two HP interfaces per batch handler for images, activations, and feature map load store, connecting the DPUCVDX8G and NoC.
Architecture | AI Engine Cores | LUT | FF | Block RAM | UltraRAM | DSP | PL NMU |
---|---|---|---|---|---|---|---|
C32B1CU1L2S2 | 32 | 82942 | 111248 | 0 | 136 | 139 | 8 |
C32B1CU2L2S2 | 64 | 165721 | 222528 | 0 | 272 | 278 | 14 |
C32B1CU3L2S2 | 96 | 248486 | 333805 | 0 | 408 | 417 | 20 |
C32B2CU1L2S2 | 64 | 146223 | 190065 | 0 | 200 | 273 | 10 |
C32B3CU1L2S2 | 96 | 209657 | 268933 | 0 | 264 | 407 | 12 |
C32B4CU1L2S2 | 128 | 273736 | 348300 | 0 | 328 | 541 | 14 |
C32B5CU1L2S2 | 160 | 338367 | 428383 | 0 | 392 | 675 | 16 |
C32B6CU1L2S2 | 192 | 403866 | 507308 | 678 | 343 | 809 | 18 |
C64B1CU1L2S2 | 64 | 93233 | 132511 | 0 | 136 | 139 | 8 |
C64B1CU2L2S2 | 128 | 186387 | 265041 | 0 | 272 | 278 | 14 |
C64B1CU3L2S2 | 192 | 280846 | 397732 | 0 | 408 | 417 | 20 |
C64B2CU1L2S2 | 128 | 157744 | 215444 | 0 | 200 | 273 | 10 |
C64B3CU1L2S2 | 192 | 222342 | 298513 | 0 | 264 | 407 | 12 |
C64B4CU1L2S2 | 256 | 286802 | 381864 | 0 | 328 | 541 | 14 |
C64B5CU1L2S2 | 320 | 355909 | 469409 | 0 | 392 | 675 | 16 |