Features - 1.3 English

DPUCVDX8G for Versal ACAPs Product Guide (PG389)

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1.3 English

The DPUCVDX8G has the following features:

  • One AXI4-Lite slave interface for accessing configuration and status registers.
  • One AXI4 master interface for DPU instruction fetch.
  • DPU with 32 AI Engines supports batch sizes 1-6.
  • DPU with 64 AI Engines supports batch sizes 1-5.
  • Supports a maximum of three homogeneous compute units (CU).
  • Supports a configurable number of AXI4 interfaces for activation and feature map load/store.

The following list highlights key supported operators for the DPUCVDX8G:

  • Convolution and transposed convolution, 2D and 3D
  • Depthwise convolution and depthwise transposed convolution, 2D and 3D
  • Max pooling
  • Average pooling
  • ReLU, ReLU6, Leaky ReLU, Hard Sigmoid, and Hard Swish
  • Correlation, 1D and 2D
  • Elementwise-Sum and Elementwise-Multiply, 2D and 3D
  • Dilation
  • Reorg
  • Argmax and Max along channel dimension
  • Fully connected layer
  • Concat, Batch Normalization