MAILBOX Offset | 32-bit Word | Field Type | Field Description |
---|---|---|---|
0x00
|
[0] | Host Request Message | Message Header 31:24 Opcode
( 23:12 Reserved 11:0 Payload length in bytes |
0x04
|
[1] | Host Request Message | Start address of the firmware section being written. |
0x08
|
[2] | Host Request Message | Total length of firmware section in bytes. |
0x0C -end |
[3:end] | Host Request Message | Firmware data |
|
Host Action | Function |
---|---|
Peek 0x28018
|
Check mailbox availability by confirming CONTROL_REG[5] is 0. |
Poke 0x29000
0x01000FFC
|
Write the request message header to MAILBOX Word 0 (Opcode and
payload length). Assumes HOST_MSG_OFFSET_REG =
Payload length: 4 bytes start address + 4
bytes total length + 4084 bytes firmware data = 4092 ( |
Poke 0x29004
0x00000200
|
Write the start address of the firmware section to MAILBOX Word 1. |
Poke 0x29008
0x00017F86
|
Write the total length of firmware section to MAILBOX Word 2 (in bytes). |
Poke 0x2900C -0x29FFC
0xXXXXXXX
|
Write the firmware data to the remaining 1021 MAILBOX words. |
Poke 0x28018
0x20
|
Set CONTROL_REG[5] to 1 to indicate a new request message is available. |
Peek 0x28018
|
Poll CONTROL_REG bit 5 until ‘0’ is received, indicating CMS has completed the operation. |
Peek 0x28304
|
Confirm there are no errors in HOST_MSG_ERR_REG. |