MAILBOX Offset | 32-bit Word | Field Type | Field Description |
---|---|---|---|
0x00
|
[0] | Host Request Message | Message Header 31:24
Opcode ( 23:0 Reserved |
0x04
|
[1] | Host Request Message | Cage Select (0-1) |
0x08
|
[2] | CMS Response Message | Low Speed I/O Read Data QSFP Module 31-5: Reserved 4: QSFP_INT_L (0: Interrupt Set, 1: Interrupt Clear) 3: QSFP_MODPRS_L (0: Module Present, 1: Module not Present) 2: QSFP_MODSEL_L (0: Module Selected, 1: Module not Selected) 1: QSFP_LPMODE (0: High Power Mode, 1: Low Power Mode) 0: QSFP_RESET_L (0: Reset Active, 1: Reset Clear) DSFP Module31-5: Reserved 4: DSFP_INT (0: Interrupt Clear, 1: Interrupt Set) 3: DSFP_PRS (0: Module not Present, 1: Module Present) 2: Reserved 1: DSFP_LPW (0: High Power Mode, 1: Low Power Mode) 0: DSFP_RST (0: Reset Clear, 1: Reset Active) SFP+ Module31-4: Reserved 3: SFP_PRS (0: Module not Present, 1: Module Present) 2-0: Reserved |
Host Action | Function |
---|---|
Peek 0x28018
|
Check availability of the mailbox by confirming CONTROL_REG[5] is 0. |
Poke 0x29000
0x0D000000
|
Write the request message header into MAILBOX
Word 0 (Opcode). Assumes HOST_MSG_OFFSET_REG =
|
Poke 0x29004
0x00000000
|
Select Cage 0 |
Poke 0x28018
0x20
|
Set CONTROL_REG[5] to 1 to indicate a new request message is available. |
Peek 0x28018
|
Poll CONTROL_REG bit 5 until ‘0’ is received indicating CMS Response is available. |
Peek 0x28304
|
Confirm there are no errors in HOST_MSG_ERR_REG. |
Peek 0x29008
|
Read low speed I/O read data and decode according to module type. Example 1 : QSFP module read data
Example 2 : DSFP module read data 0x11
0x0A
0x08
|