The Alveo X3522PV has a PCIe Gen4 x8 interface compliant with PCIe CEM 4.0. The card has a PCIe x8 physical connector.
PCIe FPGA bank allocation can be found in FPGA Bank IO Mapping. Clocking details can be found in Clocking.
Detailed UltraScale+ device and PCIe pin connections can be found in design constraints design constraints (XDC) file.