DPU Debug Registers - 1.1 English

DPUCAHX8H for Convolutional Neural Networks (PG367)
Document ID
PG367
Release Date
2022-04-14
Version
1.1 English

The DPU debug registers are used to indicate the processing cycles for task. The details of debug registers are shown in the following table.

Table 1. DPU Debug Registers
Register Address Offset Width Type Description
reg_prof_value 0x0a8 32 r Indicates the cycle counter of DPU processing time. Saturation counting.