Example System with DPUCAHX8H - 1.0 English

DPUCAHX8H for Convolutional Neural Networks (PG367)

Document ID
Release Date
1.0 English

The following figure shows two example system block diagrams with the Alveo U280 Data Center accelerator card which includes an UltraScale+ XCU280 FPGA and a PCIe® port. The card is inserted into the PCIe slot of the host server. The first example does not have user logic; all SLRs are used by DPU cores for better performance. In the other example, one SLR is reserved for user logic. You can implement a self-defined pre- or post-processing logic on this die. The DPU cores are integrated into the system through AXI interfaces that connect to the HBM, and the whole system is integrated into the server through a PCIe interconnect. It can be used to perform deep learning inference tasks such as image classification, object detection, and semantic segmentation.

Figure 1. Example System with Integrated DPU