Core_CL5 (AIE_CORE_MODULE) Register

Versal Adaptive SoC AI Engine Register Reference (AM015)

Document ID
AM015
Release Date
2024-04-12
Revision
1.2

Core_CL5 (AIE_CORE_MODULE) Register Description

Register NameCore_CL5
Offset Address0x0000030220
Absolute Address For calculated base addresses for each device, see Answer Record 000036195.
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionConfiguration register

Core_CL5 (AIE_CORE_MODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Register_Value31:0rwNormal read/write0Register Value