Interrupt_controller_1st_level_enable_A (AIE_PL_MODULE) Register - AM015

Versal Adaptive SoC AI Engine Register Reference (AM015)

Document ID
AM015
Release Date
2024-04-12
Revision
1.2

Interrupt_controller_1st_level_enable_A (AIE_PL_MODULE) Register Description

Register NameInterrupt_controller_1st_level_enable_A
Offset Address0x0000035004
Absolute Address For calculated base addresses for each device, see Answer Record 000036195.
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionInterrupt controller 1st level enable interrupt (IER_A)

Interrupt_controller_1st_level_enable_A (AIE_PL_MODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Enable_A19:0woWrite-only0x0Enable individual interrupts by setting bits in the mask value (IMR_A)