Checkbit_Error_Generation (AIE_MEMORY_MODULE) Register

Versal Adaptive SoC AI Engine Register Reference (AM015)

Document ID
AM015
Release Date
2024-04-12
Revision
1.2

Checkbit_Error_Generation (AIE_MEMORY_MODULE) Register Description

Register NameCheckbit_Error_Generation
Offset Address0x0000012000
Absolute Address For calculated base addresses for each device, see Answer Record 000036195.
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionInhibits check bits (parity or ECC) update to memory on writes

private

Checkbit_Error_Generation (AIE_MEMORY_MODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Lane3 3rwNormal read/write0x0Inhibit lane 3 check bit writes
Lane2 2rwNormal read/write0x0Inhibit lane 2 check bit writes
Lane1 1rwNormal read/write0x0Inhibit lane 1 check bit writes
Lane0 0rwNormal read/write0x0Inhibit lane 0 check bit writes