DMA_BD8_2D_Y (AIE_MEMORY_MODULE) Register

Versal Adaptive SoC AI Engine Register Reference (AM015)

Document ID
AM015
Release Date
2024-04-12
Revision
1.2

DMA_BD8_2D_Y (AIE_MEMORY_MODULE) Register Description

Register NameDMA_BD8_2D_Y
Offset Address0x000001D10C
Absolute Address For calculated base addresses for each device, see Answer Record 000036195.
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionDMA BD8 2D Y Offset, Wrap, Increment

DMA_BD8_2D_Y (AIE_MEMORY_MODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Y_Increment31:24rwNormal read/write02D DMA Y increment. How many streams before increment (value is actual -1)
Y_Wrap23:16rwNormal read/write02D DMA Y wrap. How many increments before doing a wrap(value is actual -1)
Y_Offset12:0rwNormal read/write02D DMA Y offset. How much to add for each increment.