Performance_Ctrl2 (AIE_CORE_MODULE) Register

Versal Adaptive SoC AI Engine Register Reference (AM015)

Document ID
AM015
Release Date
2024-04-12
Revision
1.2

Performance_Ctrl2 (AIE_CORE_MODULE) Register Description

Register NamePerformance_Ctrl2
Offset Address0x0000031008
Absolute Address For calculated base addresses for each device, see Answer Record 000036195.
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPerformance Counters Reset Events

Performance_Ctrl2 (AIE_CORE_MODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Cnt3_Reset_Event30:24rwNormal read/write0x0Event No to Reset Counter3
Cnt2_Reset_Event22:16rwNormal read/write0x0Event No to Reset Counter2
Cnt1_Reset_Event14:8rwNormal read/write0x0Event No to Reset Counter1
Cnt0_Reset_Event 6:0rwNormal read/write0x0Event No to Reset Counter0