Tutorial Design Description - 2024.1 English

Vivado Design Suite Tutorial: Designing IP Subsystems Using IP Integrator (UG995)

Document ID
UG995
Release Date
2024-05-30
Version
2024.1 English

This tutorial is based on a simple non-processor-based IP integrator design. It contains a few peripheral IP cores and an AXI Interconnect core, which connects to an external on-board processor.

The design targets an xc7k325 Kintex 7 device. The tutorial uses a small design with minimal hardware requirements and to enable timely completion of the tutorial, and also to minimize the data size.

Tip: Although the tutorial design targets an xc7k325 Kintex 7 device, you can choose another part, such as the xc7a35 AMD Artix™ 7 device for use with the version of the Vivado Design Suite. The tutorial results should be similar.