Boot and Configuration - 2024.1 English

Versal Adaptive SoC Board System Design Methodology Guide (UG1506)

Document ID
UG1506
Release Date
2024-06-19
Version
2024.1 English

AMD Versalâ„¢ devices have a centralized platform management controller (PMC) responsible for the boot-up process, security, power management, and debug interfaces to the PL, such as BSCAN and debug core connectivity. The Versal device includes a separate power domain for the PMC that must be powered and must perform boot-up prior to configuring the PL, NoC programming interface (NPI), and PS elements. The Versal device PMC executes the BootROM and platform loader and manager (PLM) for booting.

Versal devices can boot through PMC multiplexed I/O (MIO) pins from an external, non-volatile memory device. Devices can also boot from an external smart source, such as a microprocessor or microcontroller.

When board planning, consider boot mode and peripheral mode usage up front to ensure the required options do not reside on conflicting MIO. See the Versal Adaptive SoC Technical Reference Manual (AM011) for information about supported boot modes, MIO used, and trade-offs.