Board Design Tips - 2024.1 English

Versal Adaptive SoC Board System Design Methodology Guide (UG1506)

Document ID
UG1506
Release Date
2024-05-30
Version
2024.1 English

When designing a board, it is important to consider which interfaces and pins will assist with debug capability beyond configuration. For example, AMD recommends that you ensure the JTAG interface is accessible even when the interface is not the primary configuration mode. The JTAG interface allows you to check the device ID, check the device DNA information, and read key status registers for debug. You can also use the interface to enable indirect flash programming solutions during prototyping.

In addition, signals such as ERROR_OUT and DONE are critical for device configuration debug. AMD recommends that you connect the DONE signals to light-emitting diodes (LEDs) using LED drivers and pull-ups.

For recommended JTAG interface access and pull-up values, see this link in the Versal Adaptive SoC PCB Design User Guide (UG863) and Versal Adaptive SoC Schematic Review Checklist (XTP546).