Boot Process - 2020.2 English

The following figure depicts the primary responsibilities of the Platform Management Controller (PMC) unit, along with the memory source at each phase of the non-secure boot flow. The figure also shows how the platform loader and manager (PLM) loads the major partition components of the ACAP software stack (exceptfor Linux). U-Boot loads the Linux OS.

The boot process is divided into four phases that are independent of the selected boot mode.

• Phase 1: Pre-boot (power-up and reset)
  • The pre-boot phase is initiated when the PMC senses the PMC power domains (VCCAUX_PMC and VCC_PMC) and when the external POR_B (power on reset) pin is released.
  • PMC reads the boot mode pins and stores the value in the boot mode register.
  • PMC sends the reset signal to the ROM Code Unit (RCU).
• Phase 2: Boot setup (initialization and boot header processing)
  • The RCU begins to execute the BootROM executable from the RCU ROM.
  • The BootROM executable reads the boot mode register to select the boot device.
  • The BootROM executable reads the boot header in the PDI from the boot device and validates it.
  • The BootROM executable finds the PLM in the Programmable Device Image (PDI).
  • The BootROM executable loads the PLM from the PDI into Platform Processing Unit (PPU) RAM and validates it.
  • The BootROM executable releases the reset to the PPU to execute the PLM.
  • The BootROM executable enters a sleep state. The BootROM executable continues to run until the next power-on-reset (POR) or system reset, and is responsible for post-boot platform tasks.
• Phase 3: Load platform (boot image processing and configuration)
  • The PPU begins to execute the PLM from the PPU RAM.
  • The PLM reads and processes the PDI, validating PDI components.
  • The PLM loads the applications and data for the Arm Cortex-A72 and Cortex-R5F processors to various memories specified by the ELF file. These memories include onboard DDR and internal memories, such as on-chip memory and TCMs.
  • The PLM sends configuration information to various Versal ACAP components
    • NoC initialization
    • DDR initialization
    • PS
    • PL
    • AI engines
• Phase 4: Post-boot (Platform management and monitoring services)
  • The BootROM executable continues to run until the next power-on reset (POR) or system reset, and is responsible for its post-boot platform management tasks. The BootROM executable sleeps, and wakes up for security tampering event interrupts and for service routines.
  • The PLM continues to run until the next POR or system reset, and is responsible for its post-boot platform management tasks.