PLM Usage - 2024.1 English

Versal Adaptive SoC System Software Developers Guide (UG1304)

Document ID
UG1304
Release Date
2024-05-30
Version
2024.1 English

This section describes building PLM software using the AMD Vitis™ tool including the build flags to use, the PLM memory layout and PLM reserved memory and registers. To perform the PLM build using the Vitis tool, refer to the Embedded Design Tutorials: Versal Adaptive Compute Acceleration Platform (UG1305).