QEMU Model for Versal Devices - 2024.1 English

Versal Adaptive SoC System Software Developers Guide (UG1304)

Document ID
UG1304
Release Date
2024-05-30
Version
2024.1 English

The QEMU model for Versal devices supports the following resources:

  • Central Processing Units (CPUs)
    • Application Processing Unit (APU): 2 x Arm Cortex-A72 processor.
    • Real-time Processing Unit (RPU): 2 x Arm Cortex-R5F processor.
  • PS management controller (PSM): 1 x MicroBlaze processor
  • Platform Management Controller (PMC)
    • Platform processing unit (PPU) 0 (MicroBlaze processor)
    • Platform processing unit (PPU) 1 (MicroBlaze processor)
  • Memory
    • On-chip memory (OCM)
    • Tightly coupled memory (TCM)
    • DDR memory
    • Accelerator RAM (XRAM)
  • Security Modules
    • Device Key Storage
      • Battery Backed Random Access Memory (BBRAM)
      • eFUSE (Electronic Fuse)
      • Physical Unclonable Function (PUF - API only)
    • Crypto Primitives
      • Advanced Encryption Standard - Galois/Counter Mode (AES-GCM)
      • Secure Hash Algorithm 3 (SHA-3)
      • RSA-4096
      • Elliptic Curve Digital Signature Algorithm (ECDSA)
  • Peripheral and Controllers
    • 2 x Serial Peripheral Interface (SPI)
    • Octal SPI (OSPI)
      • OSPI DMA
    • 2 x SD
    • eMMC
    • 2 x CANFD
    • 2 x UART
    • 3 x Inter-Integrated Circuit (I2C)
      • 2 in PS
      • 1 in PMC
    • 2 x Gigabit Ethernet
    • 4 x triple timer counter (TTC)
    • Inter-processor interrupt (IPI)
    • Xilinx Memory Protection Unit (XMPU)
    • Xilinx Peripheral Protection Unit (XPPU)
    • System Memory Management Unit (SMMU)
    • General interrupt controller (GIC) v3
    • Direct memory access (DMAs)
    • Real-Time Clock (RTC)
    • USB (host-mode only)
    • System monitor (SYSMON) support