U55C Gen3x16 XDMA base_3 Platform

Alveo Data Center Accelerator Card Platforms User Guide (UG1120)

Document ID
Release Date
2.0.1 English
Platform name
Deployment name
Supported by
See Table 1 for supported tool versions
Platform UUID
Interface UUID
Release Date
April 2022
Created by
2022.1 tools
Supported XRT version
2022.1 with support planned through 2023
Satellite controller (SC) FW release
Initial release 7.1.14

For the latest SC firmware release notes, see the Alveo U55C Satellite Controller Release Notes.

Link speed
Gen3 x16
Target card


Release Notes
Change log and known issues for the platform and the SC and CMC firmware are available in the Alveo U55C Master Release Notes.

The platform implements the device floor plan shown in the following figure and uses resources across the multiple super logic regions (SLR) of the device. The static and dynamic regions are shown across the SLRs, along with the available HBM memory connections associated with SLR0.

Platform Details

Figure 1. Floorplan

To get the same information for development platforms, if you install the U55C card has access to a total of 16 GB high-bandwidth memory (HBM) accessible through 32 pseudo channels. In addition, it is possible to use device logic resources for small, fast, on-chip memory accesses as PLRAM. The following table lists the allocation of memory resources per SLR.Vitis unified software platform, use the platforminfo command utility. It reports information on interfaces, clocks, valid SLRs, allocated resources, and memory in a structured format. For more information, see platforminfo Utility in the Application Acceleration Development flow of the Vitis Unified Software Platform Documentation (UG1416).


The Alveo

Note: For details on assigning kernels to HBM memory channels see Mapping Kernel Ports to Memory.
Table 1. Available Memory Resources per SLR
Resources SLR 0 SLR 1 SLR 2
HBM memory channel (system port name) HBM[0:31] (16 GB) No connections No connections
PLRAM memory channels (system port name) U55C card has accessPLRAM[0:1] (128K per instance) PLRAM[2:3] (128K per instance) PLRAM[4:5] (128K per instance)
Host memory channels (system port name) No connections No connections HOST[0] 16 GB on host


The platform provides a 300 MHz default clock to run the accelerator.

Available Resources After Platform Installation

The following table lists the available resources in the dynamic region of each SLR. It represents the total device resources after subtracting those used by the static region.

Table 2. Platform Resource Availability per SLR
Block RAM tile 600 576 600
CLB LUT 386880 364320 395040
CLB Register 773760 728640 790080
DSP 2664 2784 2928
UltraRAM 320 320 320

Card Thermal and Electrical Protections

The following table lists the power and thermal thresholds for this platform. See CT feature details in Platform Features for how these thresholds are used.

Table 3. Platform Thermal and Electrical Protection Thresholds
Sensor Description Clock Throttling Threshold Clock Shutdown Threshold
12V PEX Current 1 5.5A 5.75A
12v AUX Current 2
  • 6.25A (2x3 or 2x4 PCIe AUX power)
  • Not measured when PCIe AUX power not connected
  • 6.5A (2x3 or 2x4 PCIe AUX power)
  • Not measured when PCIe AUX power not connected
VCCINT Temperature 105°C 110°C
FPGA Temperature 92°C 97°C
  1. 12V PEX Current represents power from the PCIe power rail.
  2. 12V AUX current represents power from the auxiliary power connector.

Deployment Platform Installation

To run applications with this platform, navigate to the Getting Started tab corresponding to your card (see the Alveo Boards and Kits landing page) and download the deployment installation packages and installation guide. Follow the procedures described in the installation guide to install the deployment platform.

Accelerated applications have software dependencies. Work with your accelerated application provider to determine which XRT version to install.

Development Platform Installation

For developing applications for use with the Alveo Data Center accelerator cards you must install and use the Vitis software platform. To set up an accelerator card for use in the development environment, follow the installation steps in: