This event signal is asserted for a single clock cycle when
s_axis_data_tlast is Low on a last incoming data
sample of a frame. This shows a configuration mismatch between the core and
the upstream data source with regard to the frame size, and indicates that
the upstream data source is configured to a larger point size than the
core.
This is only calculated when the core starts processing a
frame, so the event can lag the missing s_axis_data_tlast
by a large number of clock cycles.