Configuration Channel - 9.1 English - PG109

Fast Fourier Transform LogiCORE IP Product Guide (PG109)

Document ID
PG109
Release Date
2024-11-13
Version
9.1 English

The following table shows the Configuration channel pinout.

Table 1. Configuration Channel Pinout
Port Name Port Width I/O Description
s_axis_config_tdata Variable. See the AMD Vivado™ IDE when configuring the core. I Carries the configuration information, CP_LEN, FWD/INV, NFFT, and SCALE_SCH. See Runtime Transform Configurationfor more information
s_axis_config_tvalid 1 I Asserted by the external master to signal that it is able to provide data.
s_axis_config_tready 1 O Asserted by the core to signal that it is able to accept data.