Clocking Configuration - 3.0 English

Control Interfaces and Processing System LogiCORE IP Product Guide (PG352)

Document ID
PG352
Release Date
2021-06-16
Version
3.0 English

This page enables you to configure the peripheral clocks, PL clocks, DDR memory, AI Engine, and CPU clocks. For an overview of the reference clocks used to generate the available clocks see the Clock Distribution Diagram in the Versal ACAP Technical Reference Manual (AM011).