Running Logic Synthesis and Implementation - 2022.1 English

Vivado Design Suite User Guide: Design Flows Overview (UG892)

Document ID
UG892
Release Date
2022-04-20
Version
2022.1 English

In Non-Project Mode, each implementation step is launched with a configurable Tcl command, and the design is compiled in memory. The implementation steps must be run in a specific order, as shown in the Non-Project Mode Tcl Script Example. Optionally, you can run steps such as power_opt_design or phys_opt_design as needed. Instead of run strategies, which are only supported in Project Mode, you can use various commands to control the tool behavior. For more information, see the Vivado Design Suite User Guide: Implementation (UG904).

It is important to write design checkpoints after critical design steps for design analysis and constraints definition. With the exception of generating a bitstream, design checkpoints are not intended to be used as starting points to continue the design process. They are merely snapshots of the design for analysis and constraint definition.

Tip: After each design step, you can launch the Vivado IDE to enable interactive graphical design analysis and constraints definition on the active design, as described in Performing Design Analysis Using the Vivado IDE.