You can use the Vivado IDE to analyze designs saved as
design checkpoints. You can run a design in Non-Project Mode using Tcl commands
(synth_design, opt_design,
power_opt_design, place_design,
phys_opt_design, and route_design), store the
design at any stage, and read it in a Vivado IDE
session. You can start with a routed design, analyze timing, adjust placement to address
timing problems, and save your work for later, even if the design is not fully routed.
The Vivado IDE view banner displays the open design
checkpoint name.