Implementing the PHY - 2021.2 English

Vivado Design Suite User Guide: I/O and Clock Planning

Document ID
UG899
Release Date
2021-11-10
Version
2021.2 English

For each memory controller, the Vivado tools synthesize and stitch the physical layer (PHY) into the netlist during implementation when Phase 1 of the opt_design command is run, as shown in the following figure.

Figure 1. Implementing PHY During opt_design