There are multiple design flows for Versal ACAP, including two flows targeting projects that contain software applications. Recommendations vary based on which design flow you are using.
Fixed Hardware Platform Recommendations
When developing software applications for designs created with the fixed hardware platform design flow, Xilinx recommends using custom Linux drivers to manage the interactions between the application and PL resources.
Extensible Hardware Platform Recommendations
When developing software applications for designs created with the extensible
hardware platform design flow, Xilinx recommends
using the Xilinx Runtime (XRT) APIs to manage PL
accelerators as well as AI Engine kernels. Unless
explicitly marked as "user managed," PL and AI Engine accelerators linked to the platform using the
Vitis™
linker (v++ --link) have
standardized control and communication interfaces. The XRT APIs are optimized to
interact with these interfaces and provide abstract methods for interacting with the
accelerators. In addition, using the XRT APIs enables access to built-in profiling
and debug capabilities.
Because XRT APIs can only be used to interact with PL and AI Engine accelerators linked to the platform using the Vitis environment, PL resources that are directly included in the platform must be explicitly managed by the developer using custom drivers. Xilinx also recommends tailoring the design architecture to allow the application to reset the user-defined PL IP to a known good state to be able to handle errors. For more information about the Vitis environment and XRT, see the Vitis Unified Software Platform Documentation (UG1416).