Planning for Software Debug - 2021.1 English

Versal ACAP System and Solution Planning Methodology Guide (UG1504)

Document ID
UG1504
Release Date
2021-07-26
Version
2021.1 English

Depending on the type of processor and software stack used in the design, software debug might require enabling specific hardware interfaces in the design. Before bringing up the entire software stack, you must make sure the processor, hardware peripherals, and interconnects are functional. You can run basic bring-up tests using the JTAG interface to ensure hardware blocks are functional. The next step is to bring up the operating system (OS) framework. Specific debug might require looking at the boot log and checking if the OS load was successful. After the OS is loaded, you can run the specific application and debug application using debug tools provided by Xilinx or using open source debug tools, add built-in timers in the application processing unit (APU) to profile specific function calls, etc.

Following are details about specific software debug methods:

XSCT-based debug
The Xilinx Xilinx® Software Command Line tool (XSCT) provides a set of commands to enable hardware debug. You can also use the Xilinx System Debugger (XSDB) to run Tcl-based commands and procedures to check specific hardware status. Before bringing up the entire software stack, check that the hardware is functional by running XSDB commands, as described in the Xilinx Software Command-Line Tool (XSCT) Reference Guide (UG1208). If the design includes DDR memory, you can run read/write tests to verify that the DDR memory is functional. To debug bare-metal applications, use the XSCT debugger. You can download the application using XSCT, and use the Vitis debugger to enable single-step breakpoint insertion to debug specific functions. The Vitis debugger allows you to look at the memory and processor register content to help analyze the failing code. For more information, see the vitis -debug Command Line .
Debug using software tools
You can debug Linux-based applications using the GNU Debugger (GDB), including inserting breakpoints and resuming the program. You can also use the Valgrind Linux-based tool to help analyze memory leak issues in a program. When building the Linux image, enable GDB and Valgrind tools to enable application-specific debugging.
Special processor debug
To debug code running on a special processor, like the AI Engine or MicroBlaze™ processor, you must enable specific hardware interfaces in the design. The AI Engine processor array has an event/trace capability that helps to view the PC event or execution trace. You must enable this hardware interface during the AI Engine compilation stage. The MicroBlaze processor has MicroBlaze Debug Module (MDM) interface that can connect to the system JTAG chain. For more information, see the MicroBlaze Processor Reference Guide (UG984) and Versal ACAP AI Engine Programming Environment User Guide (UG1076).

For more information, see this link in the Versal ACAP System Integration and Validation Methodology Guide (UG1388).