Run Power Estimation - 2021.1 English

Versal ACAP System and Solution Planning Methodology Guide (UG1504)

Document ID
UG1504
Release Date
2021-07-26
Version
2021.1 English

The foundation of board design is power estimation, which determines thermal, power delivery, and decoupling network requirements. Power estimation ideally constrains the design in the Vivado® tools or Vitis™ environment to ensure a correct board design. Use the Versal™ ACAP Xilinx® Power Estimator (XPE) to estimate power requirements. For more information, see the following resources:

  • Xilinx Power Estimator User Guide for Versal ACAP (UG1275)
  • Seven Steps to an Accurate Worst-Case Power Analysis using the Xilinx Power Estimator (XAPP1348)
  • Power page on the Xilinx website
  • Xilinx Power Estimator (XPE) page on the Xilinx website
Note: You can migrate existing Zynq® UltraScale+™ MPSoC designs to the Versal ACAP XPE. However, ensure that your design takes advantage of the Versal ACAP architectural blocks to maximize efficiency in your design.