Tutorial Design Description - 2024.1 English

Vivado Design Suite Tutorial: Using Constraints (UG945)

Document ID
UG945
Release Date
2024-06-12
Version
2024.1 English

The sample design used throughout this tutorial consists of a small design called project_cpu_netlist. There is a top-level EDIF netlist source file and an XDC constraints file.

The design targets an XC7K70T device. A small design is used to allow the tutorial to run with minimal hardware requirements and to enable timely completion of the tutorial and to minimize the data size.