Tutorial Design Description - 2023.2 English - 2023.1 English

Vivado Design Suite Tutorial: Using Constraints (UG945)

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2023.2 English

The sample design used throughout this tutorial consists of a small design called project_cpu_netlist. There is a top-level EDIF netlist source file, as well as an XDC constraints file.

The design targets an XC7K70T device. A small design is used to allow the tutorial to run with minimal hardware requirements and to enable timely completion of the tutorial, as well as to minimize the data size.