Performance Pragma - 4 - 2024.1 English

Vitis HLS Messaging (UG1448)

Document ID
UG1448
Release Date
2024-05-30
Version
2024.1 English

Description

Warning: [HLS 214-347] Cannot apply performance pragma target_ti=50 cycles for loop 'VITIS_LOOP_10_1' in function 'top'. The target requires a pipeline II less than the minimal achievable II of 2 determined by the number of accesses on stream 'c' (2 per iteration) (test.cpp:11:9).

Explanation

There are too many accesses to the specified stream and this prevents an II=1 from being achieved. Consider reducing the number of accesses to the stream in one cycle.

//////////// ORIGINAL //////////// 
void top(int a[1000],
    int b[1000], hls::stream<int> &c) {
  int j;
  int b_buf[1000];
  int a_buf[1000];
  memcpy(b_buf, b, sizeof(b_buf));
  for (j = 0; j < 100; j++) {
#pragma HLS performance target_ti=50
    a_buf[j] = b_buf[j] + c.read() + c.read();
  }
  memcpy(a, a_buf, sizeof(a_buf));
}
This issue can also occur when interface ports are bundled together. Consider unbundling the ports to increase parallel accesses to the interface. Unbundling the ports can help the performance pragma to achieve its goal.