For signal to connector mapping in text format, see the relevant XDC and trace delay files. These files provide the AMD Zynq™ UltraScale+™ MPSoC constraints and package pin name to SOM240_x mapping. The SOM240 connectors adopt the naming conventions outlined in the following table.
| Signal | Description |
|---|---|
| Module (M) | The SOM, in this case the K26 SOM. |
| Carrier card (C) | The board that the SOM is plugged into is called the carrier card. |
| C2M | Signal names with C2M indicate that the signal is driven by the carrier
card and received by the SOM. |
| M2C | Signal names with M2C indicate that the signal is driven by the SOM and
received by the carrier card. |
| _P | The postfix _P
on differential signal pairs indicates the positive component of a
differential signal. |
| _N | The postfix _N
on differential signal pairs indicates the negative component of a
differential signal. |
| _L | The postfix _L
on a single-ended signal indicates an active-Low signal. This is
used for the connector pinouts only. The postfix _B is also used to
indicate an active-Low signal. |
| Example | SOM240 Connector | Function |
|---|---|---|
| GND | Both SOM240_1 and SOM240_2 | Ground pins |
| VCC_SOM | Both SOM240_1 and SOM240_2 | Power connection pins |
| MIO35 | SOM240_1 | MIO 501 bank pins |
| MIO58 | SOM240_1 | MIO 502 bank pins |
| JTAG_TMS_C2M | SOM240_1 | Configuration and control pins |
| GTR_DP1_M2C_P | SOM240_1 | PS-GTR transceiver pins |
| HPA04_P | SOM240_1 | HPA pins |
| HDA00_CC | SOM240_1 | HDA pins |
| HPB15_CC_P | SOM240_2 | HPB pins |
| HPC07_P | SOM240_2 | HPC pins |
| HDB12 | SOM240_2 | HDB pins |
| HDC00_CC | SOM240_2 | HDC pins |
| GTH_DP2_C2M_P | SOM240_2 | GTH transceiver pins |
Refer to the Zynq UltraScale+ Device Packaging and Pinouts Product Specification User Guide (UG1075) for more information on pin types.
| Example | Definition |
|---|---|
| GC | Global clock |
| HDGC | Global clock |
| VRP | DCI voltage reference resistor |
| QBC | Byte lane clock |
| DBC | Byte lane clock |
| PERSTN | Default reset pin locations for integrated block for PCI Express® |
| PU18_10 | 10.0 KΩ pull-up resistor to VCC_PS_1V80 on the SOM |
| PU18_2p2 | 2.21 KΩ pull-up resistor to VCC_PS_1V80 on the SOM |
| PU18_4p7 | 4.7 KΩ pull-up resistor to VCC_PS_1V80 on the SOM |
| PU50 | 10.0 KΩ pull-up resistor to VCC_5V0 on the SOM |
| PD50 | 49.9 KΩ pull-down resistor from VCC_5V0 on the SOM |
| AC01UF | AC coupled with 0.01 μF capacitor on the SOM |