Interfaces - 2022.2 English

The interfaces section provides a listing of all the physical interfaces available on a <component>. The <interfaces> section contains one or more <interface> tags nested within. An interface is defined by multiple ports through use of the <port_map> tag. Interfaces can be defined only inside a <component> of "type=fpga". For more information refer to Port Map.

The following is a partial example of the dip_switches_4bits interface definition from the KC705 board definition file:

<interfaces>
  <interface mode="master" name="dip_switches_4bits"
  type="xilinx.com:interface:gpio_rtl:1.0" of_component="dip_switches">
    <description>4-position user DIP Switch</description>
    <preferred_ips>
      <preferred_ip vendor="xilinx.com" library="ip" name="axi_gpio" order="0"/>
    </preferred_ips>
    <port_maps>
      <port_map logical_port="TRI_I" physical_port="dip_switches_tri_i" dir="in"
      left="3" right="0">
        <pin_maps>
          <pin_map port_index="0" component_pin="GPIO_DIP_SW0"/>
          <pin_map port_index="1" component_pin="GPIO_DIP_SW1"/>
          <pin_map port_index="2" component_pin="GPIO_DIP_SW2"/>
          <pin_map port_index="3" component_pin="GPIO_DIP_SW3"/>
        </pin_maps>
      </port_map>
    </port_maps>
  </interface> 
  <interface …>
    ...
    ...
  </interface>
</interfaces>