Configure the Pipeline Initiation Interval - 2022.2 English

ACTION: Back out the change before proceeding, right-click on the solution. Select Solution Settings command, and reset the config_compile pipeline_loop command to its default value.

Another possible optimization is to tell the tool that a specific number of clock cycles before processing another sample is acceptable, for example of two or four clock cycles. This eliminates II violations because the latency would then match your specification. The overall latency of an application indicates that perhaps II=4 for some loops is not really a problem.

In the last section, the config_compile command is a tool configuration command that affects the compilation of the whole design. This optimization uses a code directive applied to a specific portion of the source code rather than to the tool itself.

1. Open the Source Code Editor for the function.

   This can be done from the Explorer view by expanding the Source folder for the project, and double-clicking on the dct.cpp file to open it.

   With the Source Code Editor open, the right hand of the IDE also displays the Outline and Directive views for your code.

   • Outline view: Displays an outline of the displayed source code file. Select a region or function for quick navigation of the code.

   • Directives view: Select operations or elements of your code to assign HLS pragmas to your source code, or to assign set_directive commands to a Tcl script that is associated with the active solution. For more information, refer to Adding Pragmas and Directives in the Vitis HLS FLow of the Vitis Unified Software Platform Documentation (UG1416).

2. In the Directives view, right-click the dct_2d function, and select Insert Directive.

   The Vitis HLS Directive Editor is displayed.

   

3. For Directive, select the PIPELINE directive.

4. For Destination, select Directive File. This is the default.

   Directives let you create different solutions, with different directive files to optimize performance in different ways, and find the best solution. With HLS pragmas added directly into the source file, all solutions have the same optimizations.

   TIP: Late in your design process it is worth moving settled optimizations from the directive file to HLS pragmas in your C/C++ code, so the optimizations become part of your code. You will do this later in this tutorial.

5. In the II field, enter 4. This defines an acceptable level of performance, and can eliminate II violations.

6. Click OK to apply the directive. The HLS PIPELINE II=4 is added to the Directive view.

7. Click C Synthesis to rerun synthesis.

   Notice the Interval column for the dct_2d function meets the specified II requirement, however the overall results for the dct function are not meeting timing.