Elaboration Settings - 2022.1 English

Vivado Design Suite User Guide: System-Level Design Entry (UG895)

Document ID
UG895
Release Date
2022-05-11
Version
2022.1 English

When opening an elaborated design, as discussed in Elaborating the RTL Design, there are two settings that can be enabled or disabled to change the elaboration of the RTL design, as shown in the following figure.

The Elaboration page allows you to set options for the elaborated netlist view. This view is available from the Flow Navigator in RTL Analysis > Open Elaborated Design.

Figure 1. Elaboration Settings
  • Link IP Module Options:
    • Blackbox model (stub file): Treats all IP which were synthesized out-of-context as a black box.
    • Netlist model: Uses the synthesized netlist for IP that were synthesized out-of-context.
  • Constraint Options:
    • Load constraints: Applies all active constraints to the elaborated design (timing and physical).

The following Tcl commands can be defined on the source fileset to enable the RTL elaboration settings:

set_property elab_link_dcps true [current_fileset]
set_property elab_load_timing_constraints true [current_fileset]
Note: Use false to disable these settings.